Identification number: lzp-2024/1-0329
Type: Latvian Council of Science Fundamental and Applied Research project
Duration: 01.01.2025-31.12.2027
Project Leader: Dr.phys. Jūlija Hodakovska, Institute of Solid State Physics, University of Latvia (ISSP UL)
Project partners: Latvian Biomedical Research and Study Centre
Total budget: 300 000 EUR
ISSP UL budget: 210 000 EUR
Project description:
The aim of this project is to investigate real-time trans-epithelial electrical resistance (TEER) parameters, correlating resistance measurements in a gut-on-a-chip model with biological markers of barrier quality. Current TEER sensors lack a direct correlation with tight junction protein data, barrier integrity, and cell coverage in organ-on-a-chip systems, limiting their effectiveness. The project will assess the impact of electrode material, placement, and sampling frequency on signal-to-noise ratio and cell viability. The final experimental phase will correlate barrier integrity data with TEER measurements in the gut-on-a-chip model, accounting for oxygen load between the epithelial and endothelial barriers. The project’s significant impact lies in its thorough exploration of TEER application in gut-on-a-chip models, which could advance the adoption of this technology in other organ models. Additionally, it will provide a framework for correlating various TEER measurement approaches. Expected outcomes include three high-impact publications, six conference presentations, and a significant contribution to a doctoral thesis upon the project’s completion.
PROJECT PROGRESS
31.07.2026
Midterm project report submitted.
06.07.2026
Open data management plan published.
15.06.2026
Poster presentation at the FMNT conference:
“Shear stress in viscoelastic cell media within villus-mimetic gut-on-chip.”
03.06.2026
Bachelor's thesis defense by Pēteris Dambekalns:
"Iespiedshēmas plates integrēta transepiteliālās elektriskās pretestības mērījumu sistēma orgāna uz čipa ierīcēm."
01.05.2026
- Ongoing assessment of the electrode-to-PCB interface.
- Conducted electrode configuration testing using impedance spectroscopy.
- Ongoing evaluation of the influence of flow on transepithelial electrical resistance (TEER).
26.02.2026
Conference presentation at UL ISSP:
"PCB-Integrated Transepithelial Electrical Resistance Measurement System for Organ-on-Chip Applications."
01.12.2025
- Finalized the microfluidic chip-to-PCB interface design.
- Evaluated gold, silver, and platinum electrodes.
- Performed Caco-2 barrier integrity tests using Lucifer Yellow.
01.09.2025
- Finalized the microfluidic chip-to-PCB interface design.
- Successfully deposited silver and gold electrodes for hybrid OSTE–COC microfluidic chips.
- Began cell cultivation experiments.
25.03.2025
- Created the initial CAD designs for the microfluidic chip.
- Successfully fabricated hybrid OSTE–COC microfluidic chips.